Acquire/Release Visibility of Latest Operation

There is a lot of subtlety in this topic and so much information to sift through. I couldn't find an existing question/answer that specifically addressed this question, so here goes.

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If I have an atomic variable M of type std::atomic_int, where

1. Thread 1 performs M.store(1, memory_order_release)
2. Later, Thread 2 performs M.store(2, memory_order_release)
3. Even later, Thread 3 M.load(memory_order_acquire)

Is there any legitimate scenario in which Thread 3 could read the value 1 instead of 2?

My assumption is that it is impossible, because of write-write coherence and happens-before properties. But having spent an hour going over the C++ standard as well as cppreference, I still can't form a concise and definitive answer to this question.

I'd love to get an answer here with credible references. Thanks in advance.